CS8491 Computer Architecture Anna University Syllabus Regulation 17

CS8491 Computer Architecture Anna University Syllabus Regulation 17


OBJECTIVES: • To learn the basic structure and operations of a computer.   • To learn the arithmetic and logic unit and implementation of fixed-point and floating point arithmetic unit. • To learn the basics of pipelined execution. • To understand parallelism and multi-core processors.  • To understand the memory hierarchies, cache memories and virtual memories. • To learn the different ways of communication with I/O devices.

UNIT I            BASIC STRUCTURE OF A COMPUTER SYSTEM                                          9 Functional Units – Basic Operational Concepts – Performance – Instructions: Language of the Computer – Operations, Operands – Instruction representation – Logical operations – decision making – MIPS Addressing.

UNIT II            ARITHMETIC FOR COMPUTERS                                                                     9 Addition and Subtraction – Multiplication – Division – Floating Point Representation – Floating Point Operations – Subword Parallelism

UNIT III          PROCESSOR AND CONTROL UNIT                                                                  9 A Basic MIPS implementation – Building a Datapath – Control Implementation Scheme – Pipelining – Pipelined datapath and control – Handling Data Hazards & Control Hazards – Exceptions. 

UNIT IV           PARALLELISM                                                                                                     9 Parallel processing challenges – Flynn‘s classification – SISD, MIMD, SIMD, SPMD, and Vector Architectures - Hardware multithreading – Multi-core processors and other Shared Memory Multiprocessors - Introduction to Graphics Processing Units, Clusters, Warehouse Scale Computers and other Message-Passing Multiprocessors.

UNIT V          MEMORY & I/O SYSTEMS                                                                                    9 Memory Hierarchy  - memory technologies – cache memory – measuring and improving cache performance – virtual memory, TLB‘s – Accessing I/O Devices – Interrupts – Direct Memory Access – Bus structure – Bus operation – Arbitration – Interface circuits - USB.

OUTCOMES: On Completion of the course, the students should be able to:  Understand the basics structure of computers, operations and instructions.  Design arithmetic and logic unit.  Understand pipelined execution and design control unit.  Understand parallel processing architectures.  Understand the various memory systems and I/O communication.

TEXT BOOKS: 1.   David A. Patterson and John L. Hennessy, Computer Organization and Design: The Hardware/Software Interface, Fifth Edition, Morgan Kaufmann / Elsevier, 2014. 2.  Carl Hamacher, Zvonko Vranesic, Safwat Zaky and Naraig Manjikian, Computer Organization and Embedded Systems, Sixth Edition, Tata McGraw Hill, 2012.

REFERENCES: 1.  William Stallings, Computer Organization and Architecture – Designing for Performance, Eighth Edition, Pearson Education, 2010. 2.  John P. Hayes, Computer Architecture and Organization, Third Edition, Tata McGraw Hill, 2012. 3.  John L. Hennessey and David A. Patterson, Computer Architecture – A Quantitative Approach‖, Morgan Kaufmann / Elsevier Publishers, Fifth Edition, 2012.

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