EC8552 COMPUTER ARCHITECTURE AND ORGANIZATION Anna University Syllabus Regulation 17

EC8552 COMPUTER ARCHITECTURE AND ORGANIZATION Anna University Syllabus Regulation 17

EC8552               COMPUTER ARCHITECTURE AND ORGANIZATION        L T P C 3 0 0 3 


OBJECTIVES:  To make students understand the basic structure and operation of digital computer  To familiarize with implementation of fixed point and floating-point arithmetic operations  To study the design of data path unit and control unit for processor  To understand the concept of various memories and interfacing  To introduce the parallel processing technique

UNIT I COMPUTER ORGANIZATION & INSTRUCTIONS                                                    9 Basics of a computer system: Evolution, Ideas, Technology, Performance, Power wall, Uniprocessors to Multiprocessors. Addressing and addressing modes. Instructions: Operations and Operands, Representing instructions, Logical operations, control operations.

UNIT II ARITHMETIC                                                                                                                   9 Fixed point Addition, Subtraction, Multiplication and Division. Floating Point arithmetic, High performance arithmetic, Subword parallelism

UNIT III THE PROCESSOR                                                                                                          9 Introduction, Logic Design Conventions, Building a Datapath - A Simple Implementation scheme - An Overview of Pipelining - Pipelined Datapath and Control. Data Hazards: Forwarding versus Stalling, Control Hazards, Exceptions, Parallelism via Instructions.

UNIT IV MEMORY AND I/O ORGANIZATION                                                                        9 Memory hierarchy, Memory Chip Organization, Cache memory, Virtual memory. Parallel Bus Architectures, Internal Communication Methodologies, Serial Bus Architectures, Mass storage, Input and Output Devices.

UNIT V ADVANCED COMPUTER ARCHITECTURE                                                              9 Parallel processing architectures and challenges, Hardware multithreading, Multicore and shared memory multiprocessors, Introduction to Graphics Processing Units, Clusters and Warehouse scale computers - Introduction to Multiprocessor network topologies.

TOTAL:45 PERIODS 

OUTCOMES: At the end of the course, the student should be able to  Describe data representation, instruction formats and the operation of a digital computer  Illustrate the fixed point and floating-point arithmetic for ALU operation  Discuss about implementation schemes of control unit and pipeline performance  Explain the concept of various memories, interfacing and organization of multiple processors  Discuss parallel processing technique and unconventional architectures

TEXT BOOKS: 
1. David A. Patterson and John L. Hennessey, ―Computer Organization and Design‖, Fifth edition, Morgan Kauffman / Elsevier, 2014. (UNIT I-V)
2. Miles J. Murdocca and Vincent P. Heuring, ―Computer Architecture and Organization: An Integrated approach‖, Second edition, Wiley India Pvt Ltd, 2015 (UNIT IV,V)

REFERENCES 
1. V. Carl Hamacher, Zvonko G. Varanesic and Safat G. Zaky, ―Computer Organization―, Fifth edition, Mc Graw-Hill Education India Pvt Ltd, 2014.
2. William Stallings ―Computer Organization and Architecture‖, Seventh Edition, Pearson Education, 2006.
3. Govindarajalu, ―Computer Architecture and Organization, Design Principles and Applications", Second edition, McGraw-Hill Education India Pvt Ltd, 2014.

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Anna University Syllabus Regulation 17 (ECE Sem-5) DISCRETE-TIME SIGNAL PROCESSING

Anna University Syllabus Regulation 17 (ECE Sem-5) DIGITAL COMMUNICATION


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