UNIT III SEQUENTIAL CIRCUIT DESIGN 9 EC8095 Syllabus VLSI Design
Static latches and Registers, Dynamic latches and Registers, Pulse Registers, Sense Amplifier Based Register, Pipelining, Schmitt Trigger, Monostable Sequential Circuits, Astable Sequential Circuits.
Timing Issues : Timing Classification Of Digital System, Synchronous Design.
UNIT IV DESIGN OF ARITHMETIC BUILDING BLOCKS AND SUBSYSTEM EC8095 VLSI Design
Arithmetic Building Blocks: Data Paths, Adders, Multipliers, Shifters, ALUs, power and speed tradeoffs, Case Study: Design as a tradeoff.
Designing Memory and Array structures: Memory Architectures and Building Blocks, Memory
Core, Memory Peripheral Circuitry.
UNIT V IMPLEMENTATION STRATEGIES AND TESTING EC8095 VLSI Design
FPGA Building Block Architectures, FPGA Interconnect Routing Procedures. Design for Testability: Ad Hoc Testing, Scan Design, BIST, IDDQ Testing, Design for Manufacturability, Boundary Scan.